Appendix A

  Instruction Set


Instruction set in PIC16Cxx microcontroller family 
Data Transfer
Arithmetic and logic
Bit operations
Directing the program flow 
Instruction execution period
Word list

Instruction list


We have already mentioned that microcontroller is not like any other integrated circuit. When they come out of production most integrated circuits are ready to be built into devices which is not the case with microcontrollers. In order to "make" microcontroller perform a task, we have to tell it exactly what to do, or in other words we must write the program microcontroller will execute. We will describe in this chapter instructions which make up the assembler, or lower-level program language for PIC microcontrollers.

Instruction Set in PIC16Cxx Microcontroller Family

Complete set which includes 35 instructions is given in the following table. A reason for such a small number of instructions lies primarily in the fact that we are talking about a RISC microcontroller whose instructions are well optimized considering the speed of work, architectural simplicity and code compactness. The only drawback is that programmer is expected to master "uncomfortable" technique of using a reduced set of 35 instructions.

Data transfer

Transfer of data in a microcontroller is done between work (W) register and an 'f' register that represents any location in internal RAM (regardless whether those are special or general purpose registers).

First three instructions (look at the following table) provide for a constant being written in W register (MOVLW is short for MOVe Literal to W), and for data to be copied from W register onto RAM and data from RAM to be copied onto W register (or on the same RAM location, at which point only the status of Z flag changes). Instruction CLRF writes constant 0 in 'f ' register, and CLRW writes constant 0 in register W. SWAPF instruction exchanges places of the 4-bit nibbles field inside a register.

Arithmetic and logic

Of all arithmetic operations, PIC like most microcontrollers supports only subtraction and addition. Flags C, DC and Z are set depending on a result of addition or subtraction, but with one exception: since subtraction is performed like addition of a negative value, C flag is inverse following a subtraction. In other words, it is set if operation is possible, and reset if larger number was subtracted from a smaller one. 

Logic unit of PIC has capability of performing operations AND, OR, EX-OR, complementing (COMF) and rotation (RLF and RRF).
Instructions which rotate the register contents move bits inside a register through flag C by one space to the left (toward bit 7), or to the right (toward bit 0). Bit which "comes out" of a register is written in flag C, and value of C flag is written in a bit on the "opposite side" of the register.

Bit operations

Instructions BCF and BSF do setting or cleaning of one bit anywhere in the memory. Even though this seems like a simple operation, it is executed so that CPU first reads the whole byte, changes one bit in it and then writes in the entire byte at the same place.

Directing a program flow

Instructions GOTO, CALL and RETURN are executed the same way as on all other microcontrollers, only stack is independent of internal RAM and limited to eight levels. 
'RETLW k' instruction is identical with RETURN instruction, except that before coming back from a subprogram a constant defined by instruction operand is written in W register. This instruction enables us to design easily the Look-up tables (lists). Mostly we use them by determining data position on our table adding it to the address at which the table begins, and then we read data from that location (which is usually found in program memory). 

Table can be formed as a subprogram which consists of a series of 'RETLW k' instructions, where 'k' constants are members of the table.

We write the position of a member of our table in W register, and using CALL instruction we call a subprogram which creates the table. First subprogram line ADDWF PCL, f adds the position of a W register member to the starting address of our table, found in PCL register, and so we get the real data address in program memory. When returning from a subprogram we will have in W register the contents of an addressed table member. In a previous example, constant 'k2' will be in W register following a return from a subprogram.

RETFIE (RETurn From Interrupt - Interrupt Enable) is a return from interrupt routine and differs from a RETURN only in that it automatically sets GIE (Global Interrupt Enable) bit. Upon an interrupt, this bit is automatically cleared. As interrupt begins, only the value of program counter is put at the top of a stack. No automatic storing of register values and status is provided.

Conditional jumps are synthesized into two instructions: BTFSC and BTFSS. Depending on a bit status in 'f' register that is being tested, instructions skip or don't skip over the next program instruction.

Instruction Execution Period

All instructions are executed in one cycle except for conditional branch instructions if condition was true, or if the contents of program counter was changed by some instruction. In that case, execution requires two instruction cycles, and the second cycle is executed as NOP (No Operation). Four oscillator clocks make up one instruction cycle. If we are using an oscillator with 4MHz frequency, the normal time for executing an instruction is 1 Ás, and in case of conditional branching, execution period is 2 Ás.

Word list

f       any memory location in a microcontroller
W     work register
b      bit position in 'f' register
d      destination bit
label  group of eight characters which marks the beginning of a part of the program
TOS  top of stack
[]      option
<>   bit position inside register

*1 If I/O port is source operand, status on microcontroller pins is read
*2 If this instruction is executed on TMR register and if d=1, prescaler assigned to that timer will automatically be cleared
*3 If PC was modified, or test result =1, instruction was executed in two cycles.

Instruction List

Appendix contains all instructions presented separately with examples for their use. Syntax, description and its effects on status bits are given for each instruction.


A.1 MOVLW     Write constant in W register

A.2 MOVWF      Copy W to f

A.3 MOVF      Copy f to d

A.4 CLRW      Write 0 in W

A.5 Write 0 in f

A.6 SWAPF      Copy the nibbles from f to d crosswise

A.7 ADDLW      Add W to a constant

A.8 ADDWF      Add W to f

A.9 SUBLW      Subtract W from a constant

A.10 SUBWF      Subtract W from f

A.11 ANDLW      Logic AND W with constant

A.12 ANDWF      Logic AND W with f

A.13 IORLW      Logic OR W with constant

A.14 IORWF      Logic OR W with f

A.15 XORLW      Logic exclusive OR W with constant

A.16 XORWF      Logic exclusive OR W with f

A.17 INCF      Increment f

A.18 DECF      Decrement f

A.19 RLF      Rotate f to the left through CARRY

A.20 RRF      Rotate f to the right through CARRY

A.21 COMF      Complement f

A.22 BCF      Reset bit b in f

A.23 BSF      Set bit b in f

A.24 BTFSC      Test bit b in f, skip if it = 0

A.25 BTFSS      Test bit b in f, skip if =1

A.26 INCFSZ      Increment f, skip if=0

A.27 DECFSZ      Decrement f, skip if = 0

A.28 GOTO      Jump to address

A.29 CALL      Call a program

A.30 RETURN      Return from a subprogram

A.31 RETLW Return from a subprogram with constant in W

A.32 RETFIE      Return from interrupt routine

A.33 NOP      No operation

A.34 CLRWDT      Initialize watchdog timer

A.35 SLEEP      Stand by mode


Previous page Table of contents Next page